Energy Efficient

Dual I/O Bus

Fault Tolerant

 RTU Architecture

The core of the RTU design is the processor (CPU) module which executes all the software functions of the RTU. The software architecture is based on a real-time operating system for execution of time-critical tasks in a deterministic manner. Further, using hardware-assistance some of the time-consuming tasks are offloaded by the CPU to its peripherals and other modules.

The RTU can be configured to suit I/O requirements of medium to high range applications, through addition of I/O modules and expansion racks. All racks have generic I/O slots, which can be used for any of the supported I/O modules. This architecture aids in flexibility of system design while keeping costs to the optimum.

For I/O, two high-speed digital links are implemented the local I/O bus, and the expansion I/O bus. The local I/O bus is based on the popular and rugged CAN bus. It has been widely used in industrial control and automotive industry. CAN bus provides high immunity to external noises present in an industrial environment, and has built-in error handling and fault confinement features. The expansion I/O bus is based on the industry-standard ARCNet protocol. ARCNet is a deterministic, reliable bus with proven track record. The expansion bus can operate at a maximum speed of 10Mbps. Using the time-deterministic nature of the ARCNet protocol, all I/O is scanned by the CPU within a fixed time, called the RTU I/O scan cycle.

The RTU also supports a peripheral expansion bus (system bus) that provides an option to connect additional peripherals to the CPU. Communication extender modules are available for addition of serial and Ethernet ports to the RTU.

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