The ARCNet IP core provides an FPGA-based solution for implementing a fast, reliable token ring network based on the industry-standard ARCNet protocol. The offered IP core is available for Altera/Xilinx FPGAs.
- Standards-compliant ARCNet protocol implementation
- Flexible bus interface for interfacing with host controller
- Up to 10Mbps transmission speed
- Dual-redundant media option
- Supports RS485 or fiber-optic media